Renesas M16C Series User Manual page 225

M30240 Group
UARTi transmit/receive control register 0
b7 b6 b5 b4 b3 b2 b1
UART2 transmit/receive control register 0
b7 b6 b5 b4 b3 b2 b1
Figure 2.59: UARTi related registers (3)
Rev.1.00 Sep 24, 2003 Page 207 of 360
b0
Symbol
UiC0(i=0,1)
Bit
Bit name (During clock synchronous
symbol
b1 b0
CLK0 BRG count source
0 0 : f
select bit
0 1 : f
1 0 : f
CLK1
1 1 : Inhibited
Valid when bit 4 = "0"
CRS CTS/RTS function
0 : CTS function is selected (Note 1)
select bit
1 : RTS function is selected (Note 2)
0 : Data present in transmit
TXEPT Transmit register empty
register (during transmission)
flag
1 : No data present in transmit
register (transmission
completed)
0 : CTS/RTS function enabled
CRD CTS/RTS disable bit
1 : CTS/RTS function disabled
(P6
programmable I/O port)
Nothing is assigned. Write "0" when writing to this bit.
The value will be "0" when read.
0 : Transmit data is output at
falling edge of transfer clock
and receive data is input at
CKPOL CLK polarity select bit
rising edge
1 : Transmit data is output at
rising edge of transfer clock
and receive data is input at
falling edge
0 : LSB first
UFORM Transfer format select bit
1 : MSB first
Note 1: Set the corresponding port direction register to "0".
Note 2: The settings of the corresponding port register and port direction register are invalid.
b0
Symbol
U2C0
Bit
Bit name (During clock synchronous
symbol
b1 b0
CLK0 BRG count source
0 0 : f
select bit
0 1 : f
1 0 : f
CLK1
1 1 : Inhibited
Valid when bit 4 = "0"
CRS CTS/RTS function
0 : CTS function is selected (Note 1)
select bit
1 : RTS function is selected (Note 2)
0 : Data present in transmit
TXEPT Transmit register empty
register (during transmission)
flag
1 : No data present in transmit
register (transmission
completed)
0 : CTS/RTS function enabled
CRD CTS/RTS disable bit
1 : CTS/RTS function disabled
(P7
programmable I/O port)
Nothing is assigned. Write "0" when writing to this bit.
The value will be "0" when read.
0 : Transmit data is output at
falling edge of transfer clock
and receive data is input at
rising edge
CKPOL CLK polarity select bit
1 : Transmit data is output at
rising edge of transfer clock
and receive data is input at
falling edge
UFORM Transfer format select bit 0 : LSB first
(Note 3)
1 : MSB first
Note 1: Set the corresponding port direction register to "0".
Note 2: The settings of the corresponding port register and port direction register are invalid.
Note 3: Only clock synchronous serial I/O mode and 8-bit UART mode are valid.
Address
When reset
03A4 , 03AC
16 16
08
16
Function
Function
(During UART mode)
serial I/O mode)
b1 b0
is selected 0 0 : f is selected
1 1
is selected 0 1 : f is selected
8 8
is selected 1 0 : f is selected
32 32
1 1 : Inhibited
Valid when bit 4 = "0"
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 2)
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
and P6 function as (P6 and P6 function as
0 4 0 4
programmable I/O port)
Must always be "0"
Must always be "0"
Address
When reset
037C
16
08
16
Function
Function
(During UART mode)
serial I/O mode)
b1 b0
is selected 0 0 : f is selected
1 1
is selected 0 1 : f is selected
8 8
is selected 1 0 : f is selected
32 32
1 1 : Inhibited
Valid when bit 4 = "0"
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 2)
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
functions (P7 functions programmable
3
3
I/O port)
Must always be "0"
0 : LSB first
1 : MSB first
Clock-Asynchronous Serial I/O
R W
_ _
R W