Renesas M16C Series User Manual page 42

M30240 Group
• fAD
This clock has the same frequency as the main clock and is used for A-D conversion.
• fUSB
This is the 48mHz clock that is used for USB operation. This clock is generated from the main clock
by the frequency synthesizer circuit.
1.2.6.3 Clock Output
In single-chip mode, the clock output function select bits (bits 0 and 1 at address 0006
f32 to be output from the P37/CLK
address 0006 ) is set to "1", the output of f8 and f32 stops when a WAIT instruction is executed.
16
Figure 1.13 shows the system clock control registers 0 and 1.
System clock control register 0 (Note 1)
b7 b6 b5 b4
System clock control register 1 (Note 1)
b7 b6 b5 b4
0
Figure 1.13: System clock control registers 0 and 1
Rev.1.00 Sep 24, 2003 Page 24 of 360
pin. When the WAIT peripheral function clock stop bit (bit 2 at
OUT
b3 b2 b1 b0
Symbol
CM0
Bit symbol
Clock output function
CM00
select bit
CM01
WAIT peripheral function
CM02
clock stop bit
Reserved bit
Reserved bit
Reserved bit
Main clock division select
CM06
bit 0 (Note 2)
Reserved bit
Note 1: Set bit 0 of the Protect register (address 000A
Note 2: Changes to "1" when shifting to stop mode.
b3 b2 b1 b0
Symbol
0 0 0
CM1
Bit symbol
CM10 All clock stop control bit
Reserved bit
X -X
IN OUT
CM15
select bit (Note 2)
Main clock division select
CM16
bit 1 (Note 3)
CM17
Note 1: Set bit 0 of the Protect register (address 000A
Note 2: Changes to "1" when shifting to stop mode.
Note 3: Can be selected when bit 6 of the System clock control register 0 (address 0006
If "1", division mode is fiixed at "8".
Address When reset
0006 48
16 16
Bit name Function
b1 b0
0 0 : I/O port P3
7
0 1 : Invalid
1 0 : f output
8
1 1 : f output
32
0 : Do not stop f
1
1 : Stop f , f , f
1 8 32
Always set to "1"
Always set to "0"
Always set to "0"
0 : CM16 and CM17 valid
1 : Division by 8 mode
Always set to "0"
) to "1" before writing to this register.
16
Address When reset
0007 20
16 16
Bit name Function
0 : Clock on
1 : All clocks off (stop mode)
"0"
Always set to
drive capacity 0 : LOW
1 : HIGH
b7 b6
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
) to "1" before writing to this register.
16
Clock-Generating Circuit
) enable f8 or
16
R W
, f , f in wait mode
8 32
in wait mode
R W
o o
o o
o o
o o
) is "0".
16