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2
CHAPTER 19 I
C INTERFACE
2
19.2 I
C Interface Register
■ Notes on Use of I
The following care should be taken to conflicts among SCC bit, MSS bit, and INT bit.
Writing to SCC bit, MSS bit, INT bit simultaneously causes conflicts of transferring the next bite, occurrence
of the start condition, and occurrence of the stop condition. The priority in this case is as follows.
●
The following byte forwarding and stop condition generation
If "0" is written in INT bit and "0" in MSS bit, writing "0" in MSS bit is preferred and the stop condition
occurs.
●
The following byte forwarding and start condition generation
If "0" is written in INT bit and "1" in SCC bit, writing "1" in SCC bit is preferred and the start condition
occurs.
●
Start condition generation and stop condition generation
Simultaneous writing is disabled that not only "1" is written in SCC bit but also "0" is written in MSS bit.
442
2
C Bus Control Register 0 (IBCR0)
FUJITSU MICROELECTRONICS LIMITED
MB90335 Series
CM44-10137-6E
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