Fujitsu MB90335 Series Hardware Manual page 442

MB90335 Series
[Serial control register 0, 1 (SCR0, SCR1)]
PEN
P, SBL, A/D
CL
REC
RXE, TXE
[Serial Status Register 0, 1 (SSR0, SSR1)]
RIE
TIE
●
Starting communications
When the sending data is written in the serial output data registers 0, 1 (SODR0, SODR1), communication
starts. To start communication, temporal sending data must be written to the serial output data registers 0, 1
(SODR0, SODR1) even when only receiving operation is necessary.
●
Terminating communications
As soon as one frame of data is sent and received, the receiving data full flag bit (SSR0, SSR1: RDRF) is
set to "1". Having received the data, check the overrun error flag bit (SSR0, SSR1: ORE) to ensure that the
communication was successfully done.
CM44-10137-6E
: "0"
: These bits do not have the meaning.
: "1"(8-bit data)
: "0" (for initialization, error flags cleared).
: At least, it is "1" as for either
: "1" to use interrupts, "0" not to use interrupts.
: "1" to use interrupts, "0" not to use interrupts.
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 18 UART
18.7 Explanation of Operation of UART
421