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Operation of Interval Timer Function (Time-base Timer)
.......................................................... 177
Operations of Time-base Timer
Precautions when Using Time-base Timer
Program Example of Time-base Timer
Time-base Timer Control Register
Time-base Timer Control Register (TBTC)
Time-base Timer Mode
Cancellation of Time-base Timer Modes
Transition to Time-base Timer Mode
Timer
................................................... 307
Clearing Timer
Operation Flow of Timer
Startup and Stop of Timer/Pulse Width Measurement
.......................................................... 305
Timer Control Status Register
Timer Control Status Register 0 (TMCSR0)
Timer Cycle
...................................................... 308
Timer Cycle
Timer Register
16-bit Timer Register 0 (TMR0)
Timer Value
Timer Value and Reload Value
Timing
Start/stop Timing of Shift Operation and Timing of I/O
.......................................................... 381
Timing Limit Over Flag
Timing Limit Over Flag (DQ5)
TMCSR
Timer Control Status Register 0 (TMCSR0)
TMD
Priority Level of STP, SLP, and TMD Bit
TMR
16-bit Timer Register 0 (TMR0)
16-bit Timer Register 0 (TMR0)/16-bit Reload Register 0
........................................... 327
(TMRLR0)
TMRLR
16-bit Reload Register 0 (TMRLR0)
16-bit Timer Register 0 (TMR0)/16-bit Reload Register 0
........................................... 327
(TMRLR0)
TMSP
Time Stamp Register (TMSP)
Toggle Bit Flag
......................................... 498
Toggle Bit Flag (DQ6)
Token
IN, OUT, SETUP Token
........................................................ 288
SOF Token
Token Packet
....................................... 274
Setting of Token Packet
Transfer
Data Number Automatic Transfer Mode
Extended Intelligent I/O Service (EI
(Time for One Transfer)
.......................................... 241
NULL Transfer Mode
.......................................... 237
Packet Transfer Mode
Transfer Flow
2
Transfer Flow of I
C Interface
.............................. 180
................ 179
.................... 181
............... 174
.................. 148
...................... 148
...................................... 309
.............. 323
............................ 327
.............................. 307
.............................. 499
.............. 323
................ 143
............................ 327
....................... 328
................................ 208
...................................... 287
.................. 239
2
OS) Processing Time
............................ 81
............................... 449
Transfer Serial Data
Operation during Transfer Serial Data
Transfer Speed
Acquiring Transfer Speed of Destination USB Device and
Selecting Clock
Transmit Interrupt
Transmit Interrupt Generation and Flag Set Timing
..........................................................408
Type
Type and Function of USB Interrupt
U
UART
Block Diagram of UART
Example of UART Programming
Interruption of UART, EI
.........................................392
List of UART Register
.........................................427
Notes on Using UART
.............................................414
Operation of UART
UART Baud Rate Selection
UART Block Diagram of USB HOST
2
.........................................405
UART EI
OS Function
..................................................386
UART Function
..................................................404
UART Interrupt
........................................................391
UART Pins
UART Prescaler Control Register 0, 1 (UTCR0, UTCR1)
and UART Prescaler Reload Register 0, 1
(UTRLR0, UTRLR1)
UART Prescaler Control Register
UART Prescaler Control Register 0, 1 (UTCR0, UTCR1)
and UART Prescaler Reload Register 0, 1
(UTRLR0, UTRLR1)
UART Prescaler Reload Register
UART Prescaler Control Register 0, 1 (UTCR0, UTCR1)
and UART Prescaler Reload Register 0, 1
(UTRLR0, UTRLR1)
UDC Control Register
UDC Control Register (UDCC)
UDC Interruption Enable Register
UDC Interruption Enable Register (UDCIE)
UDC Status Register
UDC Status Register (UDCS)
UDCC
UDC Control Register (UDCC)
UDCIE
UDC Interruption Enable Register (UDCIE)
UDCS
UDC Status Register (UDCS)
Undefined Instruction
Exception due to Execution of an Undefined Instruction
..........................................................102
Execution of an Undefined Instruction
Upper Bank
Interrupt Occurring when the Upper Bank is Reprogrammed
..........................................................510
......................382
......................................271
..........................51
......................................388
............................428
2
OS, and μDMAC
..............405
...................................410
......................246
..............................402
..............................402
..............................402
..............................199
..............212
................................209
..............................199
..............212
................................209
.....................102
611
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