Stack Operation Of Interrupt Processing - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
3.10

Stack Operation of Interrupt Processing

Once an interrupt is accepted, the contents of the dedicated registers are automatically
saved in the system stack before control branches to the interrupt handling. Return
from the stack at the end of the interrupt handling also takes place automatically.
■ Stack Operation at the Start of Interrupt Processing
Once the interrupt is accepted, the CPU automatically saves the contents of the current dedicated registers
and their related data in the system stack in the order below:
1. Accumulator (A)
2. Direct page register (DPR)
3. Additional data bank register (ADB)
4. Data bank register (DTB)
5. Program counter bank register (PCB)
6. Program counter (PC)
7. Processor status (PS)
Figure 3.10-1 shows the stack operation at the start of interrupt handling.
Previously interrupt
SSB
00H
SSP
08FEH
A 0000H 08FEH
AH AL
DPR ADB
01H
DTB PCB
00H
PC
803FH
PS
20E0H
■ Stack Operation when Interrupt Processing Returns
When the interrupt return instruction (RETI) is executed at the end of interrupt process, the values of PS,
PC, PCB, DTB, ADB, DPR, and A return from the stack in the reverse order for the start of interrupt
handling. The dedicated registers are restored to the initial state preceding the start of interrupt.
CM44-10137-6E
Figure 3.10-1 Stack Operation at Start of Interrupt Processing
Address Memory
08FFH
08FEH
H
XX H
XX H
XX H
XX H
XX H
00H
XX H
XX H
FFH
XX H
L
XX H
XX H
XX H
08F2H
XX H
Byte
FUJITSU MICROELECTRONICS LIMITED
3.10 Stack Operation of Interrupt Processing
Immediately interrupt
SSB
00H
SP
SSP
08F2H
A 0000H
AH
DPR
01H
DTB
00H
PC
803FH
P S
20E0H
CHAPTER 3 INTERRUPT
Address Memory
08FFH
08FEH
00H
00H
08FEH
08H
AL
FEH
01H
ADB
00H 00H
00H
PCB
FFH FFH
80H
3FH
20H
E0H
08F2H
Byte
SP
AH
AL
DPR
ADB
DTB
PCB
PC
P S
SP after
updated
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