Fujitsu MB90335 Series Hardware Manual page 420

MB90335 Series
Table 18.4-3 Description of Each Bit of the Serial Status Registers 0, 1 (SSR0, SSR1) (2 / 2)
Bit name
TIE:
Transmission
bit8
interrupt request
enable bit
CM44-10137-6E
• Enable or disable send interrupt.
• When set to "1": If the data written to the serial output data registers 0, 1 is sent to the
sending shift register (SSR0, SSR1: TDRE=1), then a sending
interrupt request is generated.
FUJITSU MICROELECTRONICS LIMITED
Functions
CHAPTER 18 UART
18.4 Register of UART
399