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MB90335 Series
incremented by 1. In this case, the CMPIRQ of the host interrupt register (HIRQ) is also set to "1", and the
TKNEN bit of the host token endpoint register (HTOKEN) is cleared to 000
host control register (HCNTO) is "1", an interrupt occurs. Then, when the SOF that generates automatically
is used, the interrupt by the CMPIRQ does not occur. To clear the interrupt of the token completion, write
"0" to the CMPIRQ of the HIRQ.
SOF is automatically sent out every 1 ms while the SOFBUSY bit of the host state status register
(HSTATE) is "1". The conditions (SOF stop conditions) that make the SOFBUSY bit of the host state
status register (HSTATE) "0" are as follows:
"0" write to SOFBUSY bit of host state register (HSTATE)
Reset ("1" write to URST bit of HCNT) in USB bus
"1" write to SUSP bit of host state status register (HSTATE)
Cutting of the device (For "0" the CSTAT bit of HSTATE).
To switch from host mode to function mode, first, ensure that the SOFBUSY bit of the host state status
register (HSTATE) is "0" after writing "0" to it.
If you want to set back the SOFBUSY bit of the host state status register (HSTATE) to "1" again, you need
to run an SOF token once again.
To prevent the simultaneous executions of an SOF token and other tokens, the EOF setting register is used
to run a token you have set after making it wait for the end of SOF execution if you write to the TKNEN
bits of the host token endpoint register (HTOKEN) in a time period from the EOF setting time to SOF start
time. The unit of time for the EOF setting register is one-bit time. For example, when setting 10
EOF setting register, the following time is required: 16×1/12 MHz = 13333.3 ns in Full speed mode and
16×1/1.5 MHz = 10666.6 ns in Low speed mode. If the EOF set time is shorter than one packet time, the
SOF execution max overlap other token execution. In this case, the LSTOF bit of host error status register
(HERR) is set to "1", the SOF is not executed. When the LSTOF bit of the host error status register
(HERR) is set to "1", you must increase data of the EOF setting register. (See Section "12.4.8 EOF Setting
Register (HEOF)")
CM44-10137-6E
Figure 12.5-4 SOF Timing
SOF start
EOF set time
FUJITSU MICROELECTRONICS LIMITED
12.5 Operation of USB HOST
SOF start
EOF set time
1ms
EOF >1 packet time
CHAPTER 12 USB HOST
. When the CMPIRE bit of
B
to the
H
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