Fujitsu MB90335 Series Hardware Manual page 550

MB90335 Series
Table A-1 I/O Map (4 / 8)
Address
0000A5
H
to
0000A7
H
0000A8
Watchdog timer control register
H
0000A9
Time-base timer control register
H
0000AA
H,
0000AB
H
0000AC
Low order of DMA permission register
H
0000AD
High order of DMA permission register
H
0000AE
Flash memory control status register
H
0000AF
H
0000B0
Interrupt control registers 00
H
0000B1
Interrupt control registers 01
H
0000B2
Interrupt control registers 02
H
0000B3
Interrupt control registers 03
H
0000B4
Interrupt control registers 04
H
0000B5
Interrupt control registers 05
H
0000B6
Interrupt control registers 06
H
0000B7
Interrupt control registers 07
H
0000B8
Interrupt control registers 08
H
0000B9
Interrupt control registers 09
H
0000BA
Interrupt control registers 10
H
0000BB
Interrupt control registers 11
H
0000BC
Interrupt control registers 12
H
0000BD
Interrupt control registers 13
H
0000BE
Interrupt control registers 14
H
0000BF
Interrupt control registers 15
H
CM44-10137-6E
Registers
FUJITSU MICROELECTRONICS LIMITED
Abbreviation Access
Use prohibited
WDTC R, W
TBTC R/W, W
Use prohibited
DERL R/W
DERH R/W
FMCS R/W,R,W Flash memory I/F
Use prohibited
ICR00 R/W
ICR01 R/W
ICR02 R/W
ICR03 R/W
ICR04 R/W
ICR05 R/W
ICR06 R/W
ICR07 R/W
ICR08 R/W
ICR09 R/W
ICR10 R/W
ICR11 R/W
ICR12 R/W
ICR13 R/W
ICR14 R/W
ICR15 R/W
APPENDIX A Memory Map
Release Initial value
Watchdog
X-XXX111
Timers
Time-base
1--00100
Timers
00000000
μDMAC
00000000
000X0000
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
Interrupt controller
00000111
00000111
00000111
00000111
00000111
00000111
00000111
00000111
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
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