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MB90335 Series
Figure B.4-2 Example of Register Indirect Addressing with Post Increment (@RWj+ j = 0 to 3)
MOVW A, @RW1+ (This instruction reads data by register indirect addressing with post
Before execution
After execution
●
Register indirect addressing with offset (@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
Memory is accessed using the address obtained by adding an offset to the contents of general-purpose
register RWj. Two types of offset, byte and word offsets, are used. They are added as signed numeric
values. Address bits 16 to 23 are indicated by the data bank register (DTB) when RW0, RW1, RW4, or
RW5 is used, system stack bank register (SSB) or user stack bank register (USB) when RW3 or RW7 is
used, or additional data bank register (ADB) when RW2 or RW6 is used.
Figure B.4-3 Example of Register Indirect Addressing with Offset
MOVW A, @RW1+10H (This instruction reads data by register indirect addressing with
Before execution
After execution
CM44-10137-6E
increment and stores it in A.)
A 0 7 1 6
RW1 D 3 0 F
A 2 5 3 4 F F E E
RW1 D 3 1 1
(@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
an offset and stores it in A.)
A 0 7 1 6
2 5 3 4
RW1 D 3 0 F
A 2 5 3 4 F F E E
RW1 D 3 0 F
FUJITSU MICROELECTRONICS LIMITED
2 5 3 4
DTB 7 8
78D30F
78D310
DTB 7 8
(+10
)
H
DTB 7 8
78D31F
78D320
DTB 7 8
APPENDIX B Instructions
B.4 Indirect Addressing
Memory space
E E
H
F F
H
Memory space
E E
H
F F
H
547
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