Fujitsu MB90335 Series Hardware Manual page 446

MB90335 Series
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Function Selection
When it comes to master/slave communication, select the operation mode and data transfer direction, as
shown in Table 18.7-2. Since the parity check function cannot be used in operation mode 1, set the parity
enable bit (SCR0, SCR1:PEN) to "0".
Table 18.7-2 Select of Master/Slave Communication Function
Address
Trans-mission/
Reception
Data
Trans-mission/
Reception
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Communication procedure
The communication starts when the master CPU transmits the address data. The address data, having an A/D
bit as "1", locates the slave CPU as the destination. Each slave CPU identifies the address data based on the
program, and if there is a match with the address that is already assigned, the slave CPU communicates
(typical data) with the master CPU.
Figure 18.7-10 shows the flowchart of the master/slave communication (multiprocessor mode).
CM44-10137-6E
Operating mode
Master Slave
CPU CPU
Mode 1 -
FUJITSU MICROELECTRONICS LIMITED
18.7 Explanation of Operation of UART
Data Parity
A/D= 1
+
8 bits
Address
Not provided
A/D= 0
+
8 bits
Data
CHAPTER 18 UART
Synchronous
Stop bit
type
1 bit
Asynchronous or
2 bits
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