Fujitsu MB90335 Series Hardware Manual page 168

MB90335 Series
■ Cancellation of Sleep Modes
The low-power consumption control circuit clears sleep mode by reset input or interrupt generation.
●
Return by reset
Initialization to the main clock mode is made by reset.
●
Return by interrupt
If there is an interrupt request higher than level 7 from the peripheral circuit and others in the sleep mode,
the sleep mode is canceled. After clearing sleep mode, the action is the same as for ordinary interrupt
processing. When an interrupt is acceptable by settings in the I flag of the condition code register (CCR),
the interrupt level mask register (ILM), and the interrupt control register (ICR), the CPU performs interrupt
processing. When an interrupt is not acceptable, processing from the instruction succeeding the one which
has specified sleep mode continues.
Figure 6.5-1 shows clearing sleep mode by interrupt generation.
Figure 6.5-1 Cancellation of Sleep Mode of Interrupt Generation
Interrupt enable flag setting
of Peripheral function
Interrupt execution
Note:
When handling an interrupt, the CPU usually services the interrupt after executing the instruction that
follows the one specifying the sleep mode.
CM44-10137-6E
NO
INT generation
No Sleep cancellation
(IL<7)
YES
YES
Next instruction execution
I=0
NO
YES
Next instruction execution
ILM<IL
NO
FUJITSU MICROELECTRONICS LIMITED
CHAPTER 6 LOW-POWER CONSUMPTION MODE
No Sleep cancellation
Sleep cancellation
6.5 Standby Mode
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