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CHAPTER 16 DTP/EXTERNAL INTERRUPT
16.1 Overview of DTP/External Interrupt
16.1
Overview of DTP/External Interrupt
The DTP (Data Transfer Peripheral) is located between peripherals existing out of the
2
device and the F
MC-16LX CPU. It is the peripheral control section that receives a DMA
request or an interrupt request generated by the external peripheral, reports it to the
2
MC-16LX CPU, and starts the μDMAC or the interrupt processing.
F
■ Overview of DTP/External Interrupt
Two types, "H" and "L" can be selected as the request level for μDMAC. Four types in total, the rising
edge and falling edge in addition to "H" and "L" can be selected for an external interrupt request.
■ Block Diagram of DTP/External Interrupt
Figure 16.1-1 shows the block diagram of DTP/external interrupt.
2
F
MC-16LX bus
8
8
8
16
358
Figure 16.1-1 Block Diagram of DTP/External Interrupt
DTP/Interrupt enable register
Gate
Factor F/F
DTP/Interrupt factor register
Request level setting register
FUJITSU MICROELECTRONICS LIMITED
MB90335 Series
8
Edge detection
circuit
Request input
CM44-10137-6E
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