Interruption By Μdmac - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
Interruption by μDMAC
3.8
μDMAC is a simplified DMA with the same function as EI
3.8.1 μDMAC Function
3.8.2 Register of μDMAC
3.8.2.1 DMA Descriptor Channel Specification Register (DCSR)
3.8.2.2 DMA Status Register (DSRH/DSRL)
3.8.2.3 DMA Stop Status Register (DSSR)
3.8.2.4 DMA Enable Register (DERH/DERL)
3.8.3 DMA Descriptor Window Register (DDWR)
3.8.3.1 DMA Data Counter (DDCTH/DDCTL)
3.8.3.2 DMA I/O Register Address Pointer (DIOAH/DIOAL)
3.8.3.3 DMA Control Register (DMACS)
3.8.3.4 DMA Buffer Address Pointer (DBAPH/DBAPM/DBAPL)
3.8.4 Explanation of Operation of μDMAC
CM44-10137-6E FUJITSU MICROELECTRONICS LIMITED
CHAPTER 3 INTERRUPT
3.8 Interruption by μDMAC
2
OS.
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