Host State Status Register (Hstate) - Fujitsu MB90335 Series Hardware Manual

CHAPTER 12 USB HOST
12.4 Register of USB HOST
12.4.4

Host State Status Register (HSTATE)

The host state status register (HSTATE) is a register that indicates the status of the USB
circuit such as connections to devices and transfer mode. Note that the CLKSEL bit is
also enabled in the function mode.
■ Host State Status Register (HSTATE)
Figure 12.4-4 Bit Configuration of Host State Status Register (HSTATE)
Host state status register
bit
Address: 0000C4
H
→
Read/Write
→
Initial value
Reset On/Off at UDCC RST bit →
[bit 7, bit 6] Reserved
It is reserved bits. The reading is undefined. The writing does not influence the operation.
[bit 5] ALIVE: Keep-Alive function setting
It is a bit that sets the Keep-Alive function in Low Speed. If you set it to "1" when the CLKSEL bit in
the host state status register (HSTATE) is "0", SE0 is will be output instead of an SOF. If it is enabled
when the CLKSEL bit in the host state status register (HSTATE) is "0", and the CLKSEL becomes "1",
an SOF will be output regardless of the setting of the ALIVE bit.
[bit 4] CLKSEL: Clock selection
The operation clock of USB is selected. You must set it to "1" for Full Speed, and to "0" for Low
Speed.
You must switch clock when the RST bit in the UDC control register (UDCC) is "1" and both the
function mode and host mode are enabled. "0" setting at the function mode is a interdiction.
260
7 6 5
Reserved Reserved ALIVE
(-) (-) (R/W)
(x) (x) (0)
(-) (-)
( )
ALIVE
0 SOF
1 SE0 output (Keep-Alive)
CLKSEL
0 Clock for Low Speed
1 Clock for Full Speed
FUJITSU MICROELECTRONICS LIMITED
4 3 2
CLKSEL SOFBUSY SUSP
(R/W) (R/W) (R/W)
(1) (0) (0)
❍ ❍
( )
( ) ( )
Operation mode
Operation mode
MB90335 Series
1 0
TMODE CSTAT HSTATE
(R) (R)
(1) (0)
( ) ( )
CM44-10137-6E