Serial Status Register 0, 1 (Ssr0, Ssr1) - Fujitsu MB90335 Series Hardware Manual

MB90335 Series
18.4.3

Serial Status Register 0, 1 (SSR0, SSR1)

The serial status registers 0, 1 (SSR0, SSR1) are responsible for checking sending and
receiving and the states of errors, and setting interrupts to be enabled or disabled.
■ Serial Status Register 0, 1 (SSR0, SSR1)
bit15 bit14
Address
ch.0 : 000023
H
PE
ch.1 : 000029
H
R
R/W : Readable/Writable
R : Read only
: Initial value
CM44-10137-6E
Figure 18.4-4 Serial Status Register 0, 1 (SSR0, SSR1)
bit13 bit12 bit11 bit10
ORE FRE RDRF TDRE BDS
R R R/W
R R
FUJITSU MICROELECTRONICS LIMITED
bit9 bit7
bit8
(SIDR0, SIDR1,
RIE TIE
SODR0, SODR1)
R/W R/W
TIE Transfer interrupt request enable bit
0 Transfer interrupt request output disabled
Transfer interrupt request output enabled
1
RIE Receive interrupt request enable bit
0 Receive interrupt request output disabled
1 Receive interrupt request output enabled
BDS
Transfer direction selection bit
LSB first (Transfer form Least significant bit)
0
1
MSB first (Transfer form Most significant bit)
Transfer data empty flag bit
TDRE
0
With Transfer data (Transfer data writing disabled)
1
No Transfer data (Transfer data writing enabled)
Receive data full flag bit
RDRF
0 No Receive data
With Receive data
1
FRE Framing error flag bit
0
No Framing error
1
With Framing error
Over run error flag bit
ORE
No Over run error
0
With Over run error
1
PE Parity error flag bit
0
No Parity error
1 With Parity error
CHAPTER 18 UART
18.4 Register of UART
bit0
Initial value
00001000
B
397