Operation Of Internal Clock Mode (Single Shot Mode) - Fujitsu MB90335 Series Hardware Manual

16-bit microcontroller
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CHAPTER 14 16-BIT RELOAD TIMER
14.3 Movement of 16-bit Reload Timer
14.3.3

Operation of Internal Clock Mode (Single Shot Mode)

It is synchronized with the internal count clock, the 16-bit counter performs the count
down, and the counter underflow generates the CPU interrupt request. Also the TOT0
pin can output rectangular waveforms indicating that counting is going on.
■ Internal Clock Mode (Single Shot Mode)
When the count operation is permitted (CNTE = 1 for TMCSR0) and the timer is stared by the software
trigger bit (TRG of TMCSR0) or an external trigger, the count operation is started. When the count
permission bit and the software trigger bit are simultaneously set to "1", the count is started at the same
time of the count permission. When the counter value underflows ("0000
stops in the state of "FFFF
and the interrupt request permission bit (INTE) is set to "1", the interrupt request occurs.
In addition, the rectangular waveform indicating the count operation can be output from the TOT0 pin.
Operation of Software trigger
When "1" is written to TRG bit of timer control status register (TMCSR0), the counter is started.
Figure 14.3-7 shows the software trigger operation in the one-shot mode.
Figure 14.3-7 Count Operation in One-shot Mode (Software Trigger Operation)
Count clock
Counter
Data load
signal
UF bit
CNTE bit
TRG bit
T*
TOT0 pin
T: Machine cycle
*: It takes 1T time from trigger input to loading of reload data.
334
". At this moment, if the underflow interrupt request flag bit (UF) is set to "1"
H
−1
Reload
0000
FFFF
H
data
Start trigger input wait
FUJITSU MICROELECTRONICS LIMITED
−1
Reload
H
data
MB90335 Series
" →
"FFFF
"), the counter
H
H
0000
FFFF
H
H
CM44-10137-6E

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