State Change Diagram - Fujitsu MB90460 Series Hardware Manual

CHAPTER 6 LOW POWER CONSUMPTION MODE
6.6

State Change Diagram

Figure 6.6-1 shows the state change diagram of F
conditions.
■ State Change Diagram
Source clock osc.
stabilization wait
state
Source clock osc.
stabilization wait
state
Note:
When the clock mode is switched, do not switch to low power consumption mode and other clock
mode before this switching is completed. Confirm the completion of clock mode switching by
referring to the MCM and SCM bits of the clock selection register (CKSCR). If the mode is switched
to another clock mode or low-power-consumption mode before completion of switching, the mode
may not be switched.
106
Figure 6.6-1 State Change Diagram
Power-on
Source Osc.
stabilization wait and
[9]
reset state
[8]
[10]
[7]
Main Stop
state
PLL stop
state
[14]
[16]
Source Osc.
stabilization wait
[18]
and reset state
[17]
Main clock
reset state
2
MC-16LX operation and gives change
Main clock
[1]
reset state
[13]
[2] [3]
[5]
Main run
state
[19]
[20]
PLL run
<10>
state
[15]
[6]
[7]
<4>
[23]
PLL clock
reset state
Main clock mode
[12]
Main time-base
timer state
[4]
[6]
[11]
[21]
Main sleep
state
[22]
<1>
PLL sleep
state
<3>
<7>
<5>
PLL time-base
timer state
<8>
PLL clock mode