Ff484 Package Placement Diagrams - Xilinx Virtex-6 FPGA User Manual

Chapter 1: Transceiver and Tool Overview
Figure 1-5, page 42
information for all available device and package combinations along with the pad
numbers for the external signals associated with each GTX transceiver.

FF484 Package Placement Diagrams

Figure 1-5
X-Ref Target - Figure 1-5
www.BDTIC.com/XILINX
42
through Figure 1-23, page 60
through Figure 1-6 show the placement diagrams for the FF484 package.
LX75T: GTXE1_X0Y7
LX130T: GTXE1_X0Y15
LX75T: GTXE1_X0Y6
LX130T: GTXE1_X0Y14
QUAD_115
LX75T: GTXE1_X0Y5
LX130T: GTXE1_X0Y13
LX75T: GTXE1_X0Y4
LX130T: GTXE1_X0Y12
Figure 1-5: Placement Diagram for the FF484 Package (1 of 2)
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provide the GTX transceiver position
B1 MGTRXP3_115
B2 MGTRXN3_115
MGTTXP3_115
D1
MGTTXN3_115
D2
MGTRXP2_115
C3
MGTRXN2_115
C4
MGTTXP2_115
F1
MGTTXN2_115
F2
J4
MGTREFCLK1P_115
J3
MGTREFCLK1N_115
MGTREFCLK0P_115
L4
MGTREFCLK0N_115
L3
E3
MGTRXP1_115
E4
MGTRXN1_115
H1
MGTTXP1_115
H2
MGTTXN1_115
G3
MGTRXP0_115
G4
MGTRXN0_115
MGTTXP0_115
K1
MGTTXN0_115
K2
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
UG366_c1_05_051509