Partially Used Quad; Quad Usage Priority - Xilinx Virtex-6 FPGA User Manual

Table 5-5: Partially Unused Quad Bank

Partially Used Quad

There are four GTX transceivers in a Quad. For a partially used Quad where one or more
transceivers (but not all) are unused, the analog power supplies (MGTAVCC and
MGTAVTT) need to be connected.
transceivers in the Quad that are not used.
Table 5-6: Partially Used Quad Connections

Quad Usage Priority

If only a portion of the Quads in a Virtex-6 FPGA are used, they should be used based on
their priority. The higher priority Quads should be used before the lower priority Quads.
The prioritization of the Quads is determined by package size. Because the smaller
packages have a single internal power plane for each of the two power supply rails,
MGTAVCC and MGTAVTT, their rules for prioritization are different than for the other
packages in the Virtex-6 family of FPGAs.
Common Package Power Plane Prioritization
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Pin or Pin Pair of the Unused Quads
MGTAVCC
MGTAVTT
MGTREFCLKP/MGTREFCLKN
MGTRXP/MGTRXN
MGTTXP/MGTTXN
MGTAVTTRCAL
MGTRREF
Pin or Pin Pair of the Unused Column
MGTAVCC
MGTAVTT
MGTREFCLKP/MGTREFCLKN
MGTRXP/MGTRXN
MGTTXP/MGTTXN
MGTAVTTRCAL
MGTRREF
Priority 1: MGT115
This Quad, and specifically GTX0 within this Quad, must be instantiated if any of the
GTX transceivers in the device are used in the application. It contains the RCAL circuit
that is required for the RX and TX internal termination resistors for all of the
transceivers in a column.
Priority 2: MGT114/116
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Pin Description and Design Guidelines
AVTT and RCAL precision resistor
RCAL precision resistor
Table 5-6 shows the connections for the GTX
AVTT and RCAL precision resistor
RCAL precision resistor
Connection
AVCC
AVTT
FLOAT
GND
FLOAT
Connection
AVCC
AVTT
FLOAT
GND
FLOAT
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