IBIS-AMI Models
Table 1-6
Table 1-6: IBIS-AMI Model
IBIS-AMI Model
V5_GTP_AMI_Tx
V5_GTP_AMI_Tx.dll
V5_GTP_AMI_Rx
V5_GTP_AMI_Rx.dll
Tx_Source
SiSoft_AMI_Tx.dll
Rx_Probe
SiSoft_AMI_Rx.dll
Package Models
The package models used in this kit are based on Xilinx S-parameter data. These models
provide typical case data and can be replaced by package models for specific packages and
applications.
Table 1-7: Kit Package Model Sub-Circuits
Package Model Filename
pkg_model_v5_lxt_sxt_ff1136_typ.s4p.smod
pkg_model_v5_lxt_sxt_ff1738_typ.s4p.ports
Channel Models
This kit includes sample channel models for 22-inch, 36-inch, and 56-inch Xilinx and Tyco
backplane channels
from a single wrapper file. The Tyco channels have their own wrapper files. This allows the
channel model to be defined as a variable and selected via a drop-down menu in the
Solution Space portion of the Quantum Channel Designer GUI.
Table 1-8: Kit Channel Model Sub-Circuits
Simulation Environment
These conditions apply to the design kit:
•
•
Virtex-5 FPGA GTP Transceiver SIS Kit (IBIS-AMI)
UG587 (v1.1) June 21, 2012
lists the IBIS-AMI models that are used in the IBIS files in this kit.
Executable
V5_GTP_AMI_Tx.ami
V5_GTP_AMI_Rx.ami
Tx_Source.ami
Table 1-7
lists the package models and SPICE sub-circuits used in the kit.
(Table
1-8). These first three sets of S-parameter data are referenced
Channel Model Filename
Xilinx_Channel.smod
tyco_.s4p.smod
tyco_.s16p.smod
Operating frequency: 3.75 Gb/s
Data rate = 0.266 ns
Interconnect
No variation modeled (typical case, S-parameter data)
www.xilinx.com
IBIS-AMI File
Virtex-5 FPGA GTP TX AMI model
Virtex-5 FPGA GTP RX AMI model
Rx_Probe.ami
Package Sub-Circuit
s_pkg_model_v5_lxt_sxt_ff1136_typ
s_pkg_model_v5_lxt_sxt_ff1738_typ
Channel Sub-Circuit
s_xilinx_22_inch
s_xilinx_36_inch
s_xilinx_56_inch
s_tyco_4
s_tyco_16
Kit Overview
Description
Ideal driver AMI model
Ideal receiver AMI model
Used to Model
TX and RX package
TX and RX package
Channel Length
22 inches
36 inches
56 inches
16 inches
16 inches
11