Rx Byte And Word Alignment; Functional Description - Xilinx Virtex-6 FPGA User Manual

data. If the incoming data is inverted by transmitter or reversed RXP/RXN, the received
data should also inverted by controlling RXPOLARITY. Otherwise, the PRBS checker will
not lock. When it finds the pattern, it can detect PRBS errors by comparing the incoming
pattern with the expected pattern. The expected pattern is generated from the previous
incoming data. The checker counts the number of word (20 bits per word) errors and
increment the word error counter by 1 when an error(s) is found in the incoming parallel
data. This means that the word error counter may not match to the actual number of bit
errors if the incoming parallel data contains two or more bit errors. The error counter stops
counting when achieving 0xFFFF.
When the error occurs, RXPRBSERR is asserted. When no error is found in the following
incoming data, RXPRBSERR is cleared. Asserting PRBSCNTRESET clears the error
counter. GTXRXRESET, RXCDRRESET, and RXRESET also reset the count.
Refer to

RX Byte and Word Alignment

Functional Description

Serial data must be aligned to symbol boundaries before it can be used as parallel data. To
make alignment possible, transmitters send a recognizable sequence, usually called a
comma. The receiver searches for the comma in the incoming data. When it finds a comma,
it moves the comma to a byte boundary so the received parallel words match the
transmitted parallel words.
Figure 4-21
serial data with the comma is highlighted in the middle. The RX receiving unaligned bits
are on the right side.
X-Ref Target - Figure 4-21
100101100001001001101011100110011100101111100 1011011001010100100010101 010101100110
All Subsequent Data
Aligned to Correct
Figure 4-21: Conceptual View of Alignment (Aligning to a 10-Bit Comma)
Figure 4-22
parallel data is on the right side.
www.BDTIC.com/XILINX
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
TX Pattern Generator, page 162
shows the alignment to a 10-bit comma. The TX parallel data is on the left. The
Stream of Serial Data
Alignment Block
Finds Comma
Byte Boundary
shows the TX parallel data is on the left side, and the RX receiving recognizable
www.xilinx.com
RX Byte and Word Alignment
for more information about use models.
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