Chapter 1: Transceiver And Tool Overview; Overview - Xilinx Virtex-6 FPGA User Manual

Transceiver and Tool Overview

Overview

The Virtex®-6 FPGA GTX transceiver is a power-efficient transceiver. The GTX transceiver
is highly configurable and tightly integrated with the programmable logic resources of the
FPGA. It provides the following features to support a wide variety of applications:
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The first-time user is recommended to read High-Speed Serial I/O Made Simple
discusses high-speed serial transceiver technology and its applications. The
CORE Generator™ tool includes a Wizard to automatically configure GTX transceivers to
support configurations for different protocols or perform custom configuration (see
Virtex-6 FPGA GTX Transceiver
features that allow physical layer support for various protocols.
Figure 1-1
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Current Mode Logic (CML) serial drivers/buffers with configurable termination,
voltage swing
Programmable TX pre-emphasis/post-emphasis, RX equalization, and linear and
decision feedback equalization (DFE) for optimized signal integrity.
Line rates from 600 Mb/s to 6.6 Gb/s, with optional 5X digital oversampling required
for rates between 480 Mb/s and 600 Mb/s.
Optional built-in PCS features, such as 8B/10B encoding, comma alignment, channel
bonding, and clock correction.
Fixed latency modes for minimized, deterministic datapath latency.
Beacon signaling for PCI Express® designs and Out-of-Band signaling including
COM signal support for SATA designs.
RX/TX Gearbox provides header insertion and extraction support for 64B/66B and
64B/67B (Interlaken) protocols.
Receiver eye scan
Horizontal eye scan in the time domain for testing purposes
illustrates a block view of the Virtex-6 FPGA GTX transceiver.
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Wizard). The GTX transceiver offers a data rate range and
Chapter 1
[Ref 1], which
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