Use Modes - Tx Driver; General; Pcie Mode; Customizable User Presets - Xilinx Virtex-6 FPGA User Manual

Chapter 3: Transmitter
Table 3-32: TX Configurable Driver Attributes (Cont'd)
Attribute
TX_MARGIN_LOW_2[6:0]
TX_MARGIN_LOW_3[6:0]
TX_MARGIN_LOW_4[6:0]
Use Modes – TX Driver

General

TX_DRIVE_MODE is set to "DIRECT".
Based on the application requirement, TXDIFFCTRL, TXPREEMPHASIS, and
TXPOSTEMPHASIS values are set to the appropriate values.

PCIe Mode

TX_DRIVE_MODE is set to "PIPE".
Then the PHY Interface for the PCI Express Architecture, PCI Express 3.0 Document,
Revision 0.5, August 2008 is followed to use the TXMARGIN, TXSWING, and
TXDEEMPH signals. See
and TXPOSTEMPHASIS mappings.

Customizable User Presets

TX_DRIVE_MODE is set to "PIPE".
To make the interface easier to use, the TX_MARGIN_*_*, TX_DEEMPH_* attributes can
be set to the user defaults and then TXSWING, TXMARGIN, and TXDEEMP can be used to
control the TX driver. See
and TXPOSTEMPHASIS mappings.
This is used in a backplane situation where the presets (TX_MARGIN_*_*, TXSWING)
correspond to different slot numbers.
Use Mode – Resistor Calibration
For more information on the on-chip resistor calibration, refer to
Calibration Circuit, page
www.BDTIC.com/XILINX
178
Type
7-bit This attribute has the value of TXBUFFDIFFCTRL[2:0] and
Binary TXDIFFCTRL[3:0] that has to be mapped when TXMARGIN = 010 and
TXSWING = 1. TX_MARGIN_LOW_2 = TXBUFDIFFCTRL[2:0],
TXDIFFCTRL[3:0]. The default is 7'b1000010 (290 mV
Do not modify this value.
7-bit This attribute has the value of TXBUFFDIFFCTRL[2:0] and
Binary TXDIFFCTRL[3:0] that has to be mapped when TXMARGIN = 011 and
TXSWING = 1. TX_MARGIN_LOW_3 = TXBUFDIFFCTRL[2:0],
TXDIFFCTRL[3:0]. The default is 7'b1000000 (130 mV
Do not modify this value.
7-bit This attribute has the value of TXBUFFDIFFCTRL[2:0] and
Binary TXDIFFCTRL[3:0] that has to be mapped when TXMARGIN = 100 and
TXSWING = 1. TX_MARGIN_LOW_4 = TXBUFDIFFCTRL[2:0],
TXDIFFCTRL[3:0]. The default is 7'b1000000 (130 mV
Do not modify this value.
Table 3-31, page 173
Table 3-31, page 173
274.
www.xilinx.com
Description
PPD
PPD
PPD
for TXMARGIN, TXSWING, TXDEEMPH,
for TXMARGIN, TXSWING, TXDEEMPH,
Termination Resistor
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
typical).
typical).
typical).