Txoutclk Driving A Gtx Tx In 1-Byte Mode (Single Lane); Txoutclk Driving More Than One Gtx Tx In 2-Byte Mode (Multiple Lanes) - Xilinx Virtex-6 FPGA User Manual

Refer to the Virtex-6 FPGA Data Sheet for the maximum clock frequency and jitter
limitations of BUFR. For details about placement constraints and restrictions on clocking
resources (MMCM, BUFGCTRL, IBUFDS_GTXE1, BUFG, etc.), refer to the Virtex-6 FPGA
Clocking Resources User Guide.

TXOUTCLK Driving a GTX TX in 1-Byte Mode (Single Lane)

In
(TX_DATA_WIDTH = 8 or 10). The GEN_TXUSRCLK attribute is set to "TRUE", and the
TXUSRCLK input port is tied to ground. TXUSRCLK is internally generated by dividing
TXUSRCLK2 by 2 for the internal TX PCS datapath.
X-Ref Target - Figure 3-4
Refer to the Virtex-6 FPGA Data Sheet for the maximum clock frequency and jitter
limitations of BUFR. For details about placement constraints and restrictions on clocking
resources (MMCM, BUFGCTRL, IBUFDS_GTXE1, BUFG, etc.), refer to the Virtex-6 FPGA
Clocking Resources User Guide.
TXOUTCLK Driving More Than One GTX TX in 2-Byte Mode (Multiple
Lanes)
In
frequency must be correct for all the GTX transceivers, and they must share the same
reference clock. In 2-byte mode (TX_DATA_WIDTH = 16 or 20), the GEN_TXUSRCLK
attribute is set to "TRUE", and the TXUSRCLK input port is tied to ground. TXUSRCLK is
internally generated for the internal TX PCS datapath. The user can use either
TXPLLKDET or RXPLLLKDET as a reset signal for the design in the FPGA. If the TX PLL
is not used and is derived from the RX PLL, the active-High RXPLLLKDET signal should
be used instead.
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Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Figure 3-4, TXOUTCLK is used to drive TXUSRCLK2 for 1-byte mode
TXPLLLKDET/
RXPLLLKDET
GTX
Transceiver
TXOUTCLK
TXUSRCLK
TXUSRCLK
/2
TXUSRCLK2
TXUSRCLK2
TXDATA (8 or 10 bits)
Figure 3-4: TXOUTCLK Drives TXUSRCLK2 (1-Byte Mode)
Figure 3-5, TXOUTCLK is used to drive multiple GTX user clocks. In this situation, the
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BUFG or
BUFR
FPGA TX Interface
Design
in
FPGA
UG366_c3_21_061609
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