Use Mode - Resistor Calibration - Xilinx Virtex-6 FPGA User Manual

Table 4-8
shows the Use Mode 5 configuration.
Table 4-8: RX Termination Use Mode 5 Configuration and Notes
External
Use Mode AC
Voltage
Coupling
5 OFF
X-Ref Target - Figure 4-7
Board
External
Termination
Network
External
Termination
Network
Use Mode – Resistor Calibration
For more information on the on-chip resistor calibration, refer to
Calibration Circuit, page
www.BDTIC.com/XILINX
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
outlines the recommended settings for RX termination in Use Mode 5.
Term Internal AC Internal
Coupling Bias
Float/ OFF 800 mV
GND
FPGA
MGTAVTT_*
ESD Diodes
nominal
50Ω
nominal
50Ω
MGTAVTT_*
ESD Diodes
Figure 4-7: RX Termination Use Mode 5 Configuration
274.
www.xilinx.com
Max
Swing Suggested Protocols and Usage Notes
mV
DPP
1600 Protocol: GPON
Attribute Settings:
AC_CAP_DIS = TRUE
RCV_TERM_GND = TRUE / FALSE
RCV_TERM_VTTRX = FALSE
Notes:
True DC mode. A DC common mode of 2/3
MGTAVTT_* (800 mV) is required. To achieve
this, an external level shifting network might
be required.
nominal 7 pF
GND
nominal 7 pF
RX Analog Front End
Figure 4-7
V
CM
nominal
2/3 MGTAVTT_*
50 KΩ
nominal
50 KΩ
UG366_c4_07_071009
Termination Resistor
191