Unused Quad Column - Xilinx Virtex-6 FPGA User Manual

Table 5-2: Connected Quads (Cont'd)
Device
MGT110
XC6VSX475T-FF1759 South
Notes:
1.
Each Quad contains four transceivers.
2. FF484 and FF784 packages only have one common internal power plane for each of the Quad analog power supplies.
3.
Common: The Quad is powered by a common set of power planes (MGTAVCC, MGTAVTT).
4.
South: The Quad is powered by South package power planes (MGTAVCC_S, MGTAVTT_S).
5.
North: The Quad is powered by North package power planes (MGTAVCC_N, MGTAVTT_N).
6.
North and South represent the two planes for each of the analog power supplies, MGTAVCC and MGTAVTT.
Figure 5-4
The type of grouping for the Quads in a column depends on the device package. The FF484
and FF784 packages have a single common power plane for each of the GTX transceiver
supplies. The FF1156 and FF1759 packages have two power planes for each of the GTX
transceiver power supplies.
X-Ref Target - Figure 5-4

Unused Quad Column

If none of the Quads in a column are used in the application, the Quad device pins can be
connected as shown in
Table 5-3: Unused Quad Column Connections
www.BDTIC.com/XILINX
Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
MGT111 MGT112
South South
shows the orientation in the device of the Quad power banks within a device.
N
O
R
T
H
Virtex-6
Tranceiver
Column
FPGA
S
O
U
T
Packages:
H
FF1156, FF1759
Figure 5-4: GTX Power Plane Bank Orientation in Virtex-6 FPGA Packages
Table
Quad Pin or Pin Pair of the Unused Column
MGTREFCLKP/MGTREFCLKN
MGTRXP/MGTRXN
MGTTXP/MGTTXN
MGTAVTTRCAL
www.xilinx.com
Pin Description and Design Guidelines
(1)
Quad
MGT113 MGT114 MGT115
South South North
MGTAVCC_N
MGTAVTT_N
Tranceiver
Column
MGTAVCC_S
MGTAVTT_S
5-3.
MGTAVCC
MGTAVTT
(1)
MGT116 MGT117 MGT118
North North North
MGTAVCC
MGTAVTT
C
O
Virtex-6
M
M FPGA
O
N
Packages:
FF784, FF484
UG366_c5_04_051509
Connection
GND
GND
FLOAT
GND
FLOAT
GND
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