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CHAPTER 3 CPU
3.2.4
Processor status (PS)
The processor status (PS) consists of the bits controlling CPU and various bits
indicating the CPU status. The processor status (PS) consists of the following three
registers.
• Interrupt level mask register (ILM)
• Register bank pointer (RP)
• Condition code register (CCR)
I Configuration of Processor Status (PS)
The processor status (PS) consists of bits controlling CPU and various bits indicating the CPU status.
Figure 3.2-10 "Processor status (PS)" shows the configuration of the processor status (PS).
PS
Reset value
-
: Unused
X
: Undefined
G
Interrupt level mask register (ILM)
This register indicates the level of the interrupt that the CPU is currently accepting. The value of this
register is compared to the value of the interrupt level setting bits of the interrupt control register (ICR: IL0
to IL2) corresponding to the interrupt request of each resource.
G
Register bank pointer (RP)
This register set the memory block (register bank) to be used for the general-purpose registers allocated in
the internal RAM.
General-purpose registers can be set for up to 32 banks. The general-purpose register banks to be used are
set by setting 0 to 31 in the register bank pointer (RP).
G
Condition code register (CCR)
This register consists of various flags that are set ("1") or cleared ("0") by instruction execution result or
acceptance of an interrupt.
40
Figure 3.2-10 Processor status (PS)
RP
ILM
bit15
14
13 12 11 10
B4 B3 B2 B1 B0
ILM2
ILM1ILM0
0
0
0
0
0
0
CCR
9
8
7
6
5
4
I
S
T
-
0
0
-
0
1
X
3
2
1
bit0
N
Z
V
C
X
X
X
X
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