Dtp/External Interrupt Enable Register (Enir) - Fujitsu MB90895 Series Hardware Manual

16 bit, controller manual
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12.3.2

DTP/external interrupt enable register (ENIR)

The DTP/external interrupt enable register (ENIR) enables/disables the DTP/external
interrupt request for external interrupt pins (INT7 to INT4) and the RX pin respectively.
I DTP/external interrupt enable register (ENIR)
7
5
6
R/W
R/W
R/W
R/W : Read/Write
: Reset value
Table 12.3-3 Functions of DTP/External Interrupt Enable Register (ENIR)
bit name
bit0,
EN7 to EN4, EN0:
bit4
DTP/external interrupt
to
request enable bits
bit7
Table 12.3-4 Correspondence between DTP/External Interrupt Pins, DTP/External Interrupt
Request Flag Bits, and DTP/External Interrupt Request Enable Bits
DTP/External Interrupt Pins
Figure 12.3-3 DTP/external interrupt enable register (ENIR)
4
3
2
1
0
Re-
Re-
Re-
served
served
served
R/W
R/W
R/W
R/W
R/W
This register enables or disables DTP/external interrupt requests via the DTP/
external interrupt pin or RX pin.
When the DTP/external interrupt request flag bit (EIRR: ER) is set to "1" with the
DTP/external interrupt request enable bit (ENIR: EN) containing "1", an interrupt
request is generated to the corresponding DTP/external interrupt pin or RX pin.
Reference:
The state of the DTP/external interrupt pin or RX pin can be read directly using
the port data register irrespective of the setting of the DTP/external interrupt
request enable bit.
RX
INT4
INT5
INT6
INT7
Reset value
00000000
B
bit3 to bit1
Reserved
Be sure to set to "0".
0
bit7 to bit4,bit0
EN7 to EN4,EN0
DTP/external interrupt request enable bit
DTP/external interrupt diszbled
0
DTP/external interrupt enabled
1
Function
DTP/External interrupt
request flag bits
ER0
ER4
ER5
ER6
ER7
CHAPTER 12 DTP/external interrupt
Reserved bit
DTP/external interrupt
request enable bits
EN0
EN4
EN5
EN6
EN7
335

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