Serial Status Register 0 (Ssr0) - Fujitsu MB90895 Series Hardware Manual

14.3.3

Serial status register 0 (SSR0)

Serial status register 0 (SSR0) is used to check the reception/transmission status and
error status and to enable/disable interrupts.
I Serial status register (SSR0)
15
13
14
R R R
R/W : Read/Write
R : Read only
X : Undefined
: Unused
: Reset value
Figure 14.3-4 Serial status register (SSR0)
12 11 10 9 8
R R R/W R/W
bit8
TIE
0
1
bit9
RIE
0
1
bit11
TDRE
0
1
bit12
RDRF
0
1
bit13
FRE
0
1
bit14
ORE
0
1
bit15
PE
0
1
Reset value
00001X00
B
Transmission interrupt enable bit
Transmission interrupt disabled
Transmission interrupt enabled
Reception interrupt enable bit
Reception interrupt disabled
Reception interrupt enabled
Transmission data writing flag bit
With transmission data (writing of transmission data disabled)
Without transmission data (writing of transmission data enabled)
Reception data load flag bit
Without reception data
With reception data
Framing error flag bit
Without framing error
With framing error
Over run error flag bit
Without over run error
With over run error
Parity error flag bit
Without parity error
With parity error
CHAPTER 14 UART0
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