A/D Control Status Register (High) (Adcs: H) - Fujitsu MB90895 Series Hardware Manual

CHAPTER 13 8/10-bit A/D converter
13.3.1

A/D Control Status Register (High) (ADCS: H)

The A/D control status register (High) (ADCS: H) provides the following settings:
• Starting A/D conversion function by software
• Selecting start trigger for A/D conversion
• Storing A/D conversion results in A/D data register to enable or disable interrupt
request
• Storing A/D conversion results in A/D data register to check and clear interrupt
request flag
• Pausing A/D conversion and checking state during conversion
I A/D Control Status Register (High) (ADCS: H)
15
14
R/W R/W
R/W : Read Write
: Reset value
356
Figure 13.3-2 A/D Control Status Register (High) (ADCS: H)
13 12 11 10 9 8
R/W R/W R/W R/W W R/W
Reset value
0 0 0 0 0 0 0 0
B
bit8
Reserved bit
Reserved
0 Be sure to set to "0".
bit9
STRT A/D conversion software start-up bit
0
A/D conversion function doesn't start-up.
1
A/D conversion function start-up.
bit11 bit10
STS1 STS0 A/D conversion start-up trigger select bit
0 0
Software stra-up
0 1
Software stra-up or external trigger start-up
1 0
Software stra-up or internal timer start-up
1 1
Software stra-up, external trigger or internal timer start-up
bit12
Temporary stop flag bit
PAUS
(Valid only when EI
A/D conversion operation doesn't stop temporarily.
0
A/D conversion operation stops temporarily.
1
bit13
Interrupt request enable bit
INTE
Interrupt request disabled
0
Interrupt request enabled
1
bit14
Interrupt request flag bit
INT
Read
Not finish A/D conversion
0
1 Finish A/D conversion
bit15
A/D conversion operating flag bit
BUSY
Read
Finish A/D conversion
0
(no starting-up state)
1
In operating of A/D conversion
2
OS is used)
Write
Clear to "0"
No effection
Write
Terminates A/D conversion
forcibly
No effection