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CHAPTER 16 CAN controller
Table 16.3-16 Functions of Reception Complete Register (RCR)
bit0
to
bit7
516
Bit name
RC7 to0:
These bits indicate whether the message buffer (x) completes
Reception complete bit 7
message transmitting.
to 0
When message receiving completed: 1 is set to the RCx bit
corresponding to the message buffer (x) that completes
receiving.
When set to 0: Clears bits when receiving already completed
When set to 1: No effect
Read using read modify write instructions: 1 always read
•
[Generation of reception complete interrupt]
•
Note:
Function
Setting the RCx bit when receiving is completed (TCx = 1)
overrides clearing of the RCx bit when 0 is written (RCx = 0)
if both occur at the same time.
If the transmit complete enable register is set (RIER: RIEx =
1), a reception complete interrupt is generated when
receiving is completed.
To clear the reception complete register (RCR), read the
received message after the completion of receiving and write
0.
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