Fujitsu MB90895 Series Hardware Manual page 219

G
Example of operation of timebase timer
Figure 5.5-2 gives an example of the operation that the timebase timer performs under the following
conditions:
• A power-on reset occurs.
• The mode transits to the sleep mode during the operation of the interval timer.
• The mode transits to the stop mode during the operation of the interval timer.
• A request to clear the timebase timer counter is issued.
At transition to the stop mode, the timebase timer counter is cleared to stop counting.At return from the
stop mode, the timebase timer counts the oscillation stabilization wait time of the main clock.
Figure 5.5-2 Example of operation of timebase timer
Counter value
3FFFF
H
Oscillation stabilization
waiting over flow
00000
H
Start CPU
operation
Power-on reset
TBOF bit
TBIE bit
SLP bit
(LPMCR register)
STP bit
(LPMCR register)
When set the interval time select bit (TBTC TBC1, TBC0) to "11
Oscillation stabilization waiting time
HCLK Oscillation clock
Clear by transfering to
stop mode
Interval cycle
(TBTC TBC1 TBC0=11
Clear by interrupt process
Sleep
Cancellation of sleep at interval
interrupt of timebase timer
CHAPTER 5 Timebase timer
Counter clear
)
B
(TBTC TBR=0)
Stop
19
" (2 /HCLK)
B
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