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CHAPTER 15 UART1
bit8
bit9
bit10
bit11
bit12
bit13
bit14
bit15
438
Table 15.3-2 Functions of Serial Control Register 1 (SCR1)
bit name
TXE:
Transmit enable bit
RXE:
Receive enable bit
REC:
Receive error flag
clear bit
A/D:
Address/data select
bit
CL:
Data-length select bit
SBL:
Stop-bit length select
bit
P:
Parity select bit
PEN:
Parity addition
enable bit
Enable or disable the UART1 for sending.
When set to "0": Transmission disabled
When set to "1": Transmission enabled
Note:
When transmitting is disabled during transmitting, transmitting stops
after the data in the serial input data register being transmitted is
completed in the serial input data register.-
To set this bit to "0", after writing data to SODR1, wait for a time of 1/
16th of the baud rate in the asynchronous mode and for a time equal to
or more than the baud rate in the synchronous mode.
Enable or disable the UART1 for receiving.
When set to "0": Reception disabled
When set to "1": Reception enabled
Note:
When receiving is "disabled" during receiving, receiving stops after the
data being received is stored in the serial input data register.
Clear the receive error flags (bit 15 to 13: PE, ORE and FRE) of the serial
status register (SSR1) to "0".
When set to "0": Clears PE, ORE and FRE flags
When set to "1": No effect
When read: 1 always read
Note:
When a receive interrupt is "enabled" (bit 9: RIE = 1), set the bit10:
REC bit to "0" only when any one of the PE, ORE and FRE flags is set
to "1".
In operation mode 1 (asynchronous multiprocessor mode), set the data
format of the frame to be transmitted/received.
When bit set to "0": Data frame set
When bit set to "1": Address data frame set
Specify the length of send and receive data.
Note:
A data length of "7 bits" can be selected only in operation mode 0
(asynchronous normal mode).In operation modes 1 and 2
(asynchronous multiprocessor mode, Clock synchronous mode), be
sure to set a data length of "8 bits".
Set the length of the stop bit (frame end mark of send data) in operation
modes 0 and 1 (multiprocessor mode, synchronous mode).
Note:
At receiving, only the first bit of the stop bit is always detected.
Select either odd or even parity when "with parity" (PEN = 1) is set.
Specify whether to add (at sending) and detect (at receiving) a parity bit.
Note:
A parity bit is not added in operation modes 1 and 2 (Multiprocessor
mode, Synchronous mode).Be sure to set this bit to "0".
Function
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