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12.3.4
Detection Level Setting Register (ELVR) (Low)
The detection level setting register (ELVR) (Low) sets the levels or edges of input
signals that cause interrupt factors in the RX pin.
I Detection Level Setting Register (ELVR) (Low)
7
6
5
Re-
Re-
Re-
served
served
served
R/W
R/W
R/W
R/W : Read/Write
: Reset value
Table 12.3-7 Functions of Detection Level Setting Register (ELVR) (Low)
bit name
bit0
LB0, LA0:
to
Detection condition
bit1
select bits
Table 12.3-8 Correspondence between Detection Level Setting Register (ELVR) (Low) and
Channels
Figure 12.3-5 Detection Level Setting Register (ELVR) (Low)
4
3
2
1
0
Re-
Re-
Re-
served
served
served
R/W
R/W
R/W
R/W
R/W
These bits set the levels or edges of input signals from external peripheral devices
that cause interrupt factors in the RX pin.
•
Two levels or two edges are selectable for external interrupts, and two levels are
selectable for the EI
Reference:
When the set detection signal is input to the RX pin, the DTP/external interrupt
request flag bits are set to "1" even if DTP/external interrupt requests are
disabled (ENIR: EN = 0).
DTP/External Interrupt Pins
RX
Reset value
00000000
B
bit1 bit0
LB0, LA0
Detection condition select bit
0
0
"L" level detection
0
1
"H" level detection
1
0
Rising edge detection
1
1
Falling edge detection
bit7 to bit2
Reserved
0
Be sure to set to "0".
Function
2
OS.
CHAPTER 12 DTP/external interrupt
Reserved bit
bit name
LB0 to LA0
337
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