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CHAPTER 15 UART1
Table 15.3-3 Functions of Serial Mode Register 1 (SMR1)
bit0
bit1
bit2
bit3
to
bit5
bit6
bit7
Note:
When "0" is written to the RST bit of Serial Mode Register, the interruption UART should be
prohibited.To prohibit the interruption, take one of the following procedures:
• Interrupt disabling method
• (1)Before writing "0" to the RST bit, clear I flag to prohibit all interrupt factors.(2)Before
writing "0" to the RST bit, prohibit the UART interruption with the ILM register.(3)When 0
is written to the RST bit, writing should be performed at the UART interruption level or the
level with higher priority than the UART interruption.
440
bit name
SOE:
Enable or disable output of serial data.
Serial-data output
When set to "0": "General-purpose I/O port" set
enable bit
When set to "1": "Serial data output pin" set
SCKE:
Switch between input and output of the serial clock.
Serial clock I/O enable
When set to "0": "General-purpose I/O port" or "serial clock
bit
input pin" set
When set to "1": "Serial clock output pin" set
Note:
UART Reset bit
This bit resets all registers in the UART1.
RST:UART
When set to "0": No effect on operation
When set to "1": Resets all registers in UART1
CS0 to : CS2
Set the clock input source for the baud rate.
Clock input source
•
select bits
•
MD0, MD1 :
Select the UART1 operation mode.
Operation mode select
Note:
bits
Function
(1)When using the SCK1 pin as the serial clock input, set
the pin to the input port using the port direction register
(DDR).Also select the external clock (bit 5 to 3: CS2 to CS0
= 111
) using the clock input source select bit.
B
(2)When using the SCK pin as the serial clock output, set
the clock input source select bit to anything other than the
external clock (bit 5 to 3: CS2 to CS0 = anything other
than 111
).
B
Select the external clock (SCK1 pin), internal timer (16-bit
reload timer), or dedicated baud rate generator as the clock
input source.
Set the baud rate when selecting the dedicated baud rate
generator.
(1)In operation mode 1 (asynchronous multiprocessor
mode), only the master can be used for master/slave
communication.In operation mode 1, the address/data bit on
bit 9 cannot be received, so the slave cannot be used.
(2)In operation mode 1 (asynchronous multiprocessor
mode), the parity check function cannot be used, set the
parity addition enable bit to "no parity" (SCR1 register
bit 15: PEN = 0).
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