Reset Factor Bit - Fujitsu MB90895 Series Hardware Manual

3.6.4

Reset Factor Bit

To check reset factors, read the value of the watchdog timer control register (WDTC).
I Reset Factor Bit
Each reset factor provides a flip-flop circuit corresponding to each factor. The state of the flip-flop circuit
can be checked by reading the value of the watchdog timer control register (WDTC). If it is necessary to
identify reset factors after completion of the reset operation, read the value of the watchdog timer control
register (WDTC) by software to branch to the appropriate program.
Watchdog timer
control register (WDTC)
S : Set
R : Reset
Q : Out put
F/F : Flip Flop
Figure 3.6-5 Block Diagram of Reset Factor Bits
RST pin
Power on
RST=L
Power on
External reset
generate
request
detection circuit
detection circuit
S R S R
F/F F/F
Q Q
2
F MC 16LX internal bus
Without clear
during interval time
Watchdog taimer
reset generate
detection circuit
Clear
S R S R
F/F F/F
Q Q
CHAPTER 3 CPU
RST bit set
LPMCR register
RST bit program
detection circuit
Delay
circuit
Watchdog timer
control register
(WDTC) read
103