Fujitsu MB90895 Series Hardware Manual page 228

CHAPTER 6 Watchdog timer
G
Count clock selector
The count clock selector selects the timebase timer output or watch timer output as a count clock input to
the watchdog timer.Each timer output has four time intervals that can be set.
G
Watchdog timer counter (2-bit counter)
The watchdog timer counter is a 2-bit counter that uses the timebase timer output or watch timer output as a
count clock.The clock source output destination is set by the watchdog clock select bit in the watch timer
control register (WTC: WDCS).
G
Watchdog reset generator
The watchdog reset generation circuit generates a reset signal when the watchdog timer overflows.
G
Counter clear circuit
The counter clear controller clears the watchdog timer counter.
G
Watchdog timer control register (WDTC)
The watchdog timer control register starts and clears the watchdog timer, sets the interval time, and holds
reset factors.
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