Fujitsu MB90895 Series Hardware Manual page 646

APPENDIX
Figure A.4-2 Example of register indirect addressing with post increment (@RWj+ j = 0 to 3)
MOVW A, @RW1+
G
Register indirect addressing with offset (@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
Memory is accessed using the address obtained by adding an offset to the contents of general-purpose
register RWj. Two types of offset, byte and word offsets, are used. They are added as signed numeric
values. Address bits 16 to 23 are indicated by the data bank register (DTB) when RW0, RW1, RW4, or
RW5 is used, system stack bank register (SSB) or user stack bank register (USB) when RW3 or RW7 is
used, or additional data bank register (ADB) when RW2 or RW6 is used.
Figure A.4-3 Example of register indirect addressing with offset
MOVW
628
(This instruction reads data by register indirect addressing with post
increment and stores it in A.)
Before execution
A
RW1
After execution
A
RW1
(@RWi + disp8 i = 0 to 7, @RWj + disp16 j = 0 to 3)
A, @RW1+10H
(This instruction reads data by register indirect addressing with an
offset and stores it in A.)
Before execution
A
RW1
After execution
A
RW1
0 7 1 6 2 5 3 4
D 3 0 F DTB 7 8 78D310H
78D30FH
2 5 3 4 F F E E
D 3 1 1 DTB 7 8
0 7 1 6 2 5 3 4
D 3 0 F DTB 7 8 78D320H
78D31FH
(+10H)
2 5 3 4 F F E E
D 3 0 F DTB 7 8
Memory space
F F
E E
Memory space
F F
E E