Effective Address Field - Fujitsu MB90895 Series Hardware Manual

16 bit, controller manual
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APPENDIX
A.6

Effective Address Field

Table A.6-1 effective address field.
I Effective Address Field
Table A.6-1 Effective Address Field (1/2)
Code
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
636
Representation
R0
RW0
RL0
R1
RW1
(RL0)
R2
RW2
RL1
Register direct: Individual parts
R3
RW3
(RL1)
correspond to the byte, word, and long
R4
RW4
RL2
word types in order from the left.
R5
RW5
(RL2)
R6
RW6
RL3
R7
RW7
(RL3)
@RW0
@RW1
Register indirect
@RW2
@RW3
@RW0+
@RW1+
Register indirect with post increment
@RW2+
@RW3+
@RW0+disp8
@RW1+disp8
@RW2+disp8
@RW3+disp8
Register indirect with 8-bit displacement
@RW4+disp8
@RW5+disp8
@RW6+disp8
@RW7+disp8
Address format
Byte count of extended
address port number
*
of byte
0
0
1

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