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CHAPTER 16 CAN controller
Table 16.3-20 Functions of Acceptance Mask Select Register (AMSR)
bit0
:
:
:
:
bit15
524
Bit name
ASM7.0 to 0.0, 7.1 to
These bits select the mask (acceptance mask) format for
0.1:
comparison between the received message ID and message
buffer ID (IDR) for the message buffer (x). No comparison with
Acceptance mask select
masked bits is made.
bits 7.0 to 0.0, 7.1 to 0.0
Full-bit comparison: All bits are compared in collating the
setting values of the ID register (IDR) with the received message
ID.
Full-bit masking: All bits for the setting values of the ID register
(IDR) and the received message ID are masked.
Using acceptance mask register 0 (or 1): The acceptance mask
register 0 or 1 (AMR0 or AMR1) is used as an acceptance mask
filter.At collating the setting values of the ID register (IDR) with
the received message ID, only the bits set to 0 and corresponding
to the AMx bit in the acceptance mask register are compared and
the bits set to 1 and corresponding to the AMx bit are masked.
•
Note:
•
Function
If the AMSx.1 and AMSx.0 bits are set to 10 B or 11 B,
always set the acceptance mask register (AMR0 or AMR1)
to be used, too.
The acceptance mask select register (AMSR) should be set
after disabling the message buffer (x) to be set (BVALR:
BVALx = 0). Setting the acceptance mask select register
(AMSR) with the message buffer (x) enabled may store a
message unnecessary received.
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