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CHAPTER 13 8/10-bit A/D converter
13.1
Overview of 8-/10-bit A/D Converter
The 8-/10-bit A/D converter converts the analog input voltage to a 8- or 10-bit digital
value by using the RC sequential-comparison converter system.
• An input signal can be selected from the input signals of the analog input pins for 8
channels.
• The start trigger can be selected from a software trigger, internal timer output, and an
external trigger.
I Function of 8-/10-bit A/D Converter
The 8-/10-bit A/D converter converts the analog voltage (input voltage) input to the analog input pin into
an 8- or 10-bit digital value (A/D conversion).
The 8-/10-bit A/D converter has the following functions:
• A/D conversion time is a minimum of 6.12 µs* per channel including sampling time.
• Sampling time is a minimum of 2.0 µs* per channel.
• RC sequential-comparison converter system with sample & hold circuit
• Setting of 8-bit or 10-bit resolution enabled
• Analog input pin can be used up to 8 channels.
• Generates interrupt request by storing A/D conversion results in A/D data register
• Starts EI
conversion.
• Selects start trigger from software trigger, internal timer output, and external trigger (falling edge)
*:When the machine clock operates at 16 MHz
I Conversion Modes of 8-/10-bit A/D Converter
There are conversion modes of 8-/10-bit A/D converter as shown below:
Table 13.1-1 Conversion Modes of 8-/10-bit A/D Converter
Conversion Mode
Single-shot
conversion mode
Continuous
conversion mode
Pause-conversion
mode
350
2
OS if interrupt request generated. Use of the EI
A/D conversion is performed sequentially from the start channel to the end
channel.When A/D conversion for the end channel is terminated, it stops.
A/D conversion is performed sequentially from the start channel to the end
channel.When A/D conversion for the end channel is terminated, it is continued
after returning to the start channel.
A/D conversion is performed sequentially from the start channel to the end
channel.When A/D conversion for the end channel is terminated, A/D
conversion and pause are repeated after returning to the start channel.
2
OS prevents data loss even at continuous
Description
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