Fujitsu MB90895 Series Hardware Manual page 569

Figure 16.5-7 Example of Operation of Multiple Message Buffer
Initialization
AMSR
Acceptance
Maskregister choice
AMR0
Message Buffers5
Message Buffers6
Message Buffers7
Message receiving
Reception message
Message Buffers5
Message Buffers6
Message Buffers7
Message receiving
Reception message
Message Buffers5
Message Buffers6
Message Buffers7
Message receiving
Reception message
Message Buffers5
Message Buffers6
Message Buffers7
Message receiving
Reception message
Message Buffers5
Message Buffers6
Message Buffers7
AMS7 AMS6 AMS5
10 10 10
AM28 to AM18
0000 1111 111
ID28 to ID18 IDE
0101 0000 000 0
0101 0000 000 0
0101 0000 000 0
mask
→
Message Buffers 5 memory
ID28 to ID18 IDE
0101 1111 000 0
0101 1111 000 0
0101 0000 000 0
0101 0000 000 0
→
Message Buffers 6 memory
ID28 to ID18 IDE
0101 1111 001 0
0101 1111 000 0
0101 1111 001 0
0101 0000 000 0
→
Message Buffers 7 memory
ID28 to ID18 IDE
0101 1111 010 0
0101 1111 000 0
0101 1111 001 0
0101 1111 010 0
→
Receive overrun (ROVR5 = 1)occurs,Message buffer 5 memory
ID28 to ID18 IDE
0101 1111 011 0
0101 1111 011 0
0101 1111 001 0
0101 1111 010 0
CHAPTER 16 CAN controller
IDE7 IDE6 IDE5
0 0
IDER
RC7 RC6 RC5
0 0
RCR
ROVRR 0 0
ROVR7 6
RCR 0 0
0 0
ROVRR
0 1
RCR
0 0
ROVRR
1 1
RCR
0 0
ROVRR
1 1
RCR
0 0
ROVRR
0
0
0
5
1
0
1
0
1
0
1
1
551