Main Pcb - Kyocera Mita KM-4530 Service Manual

2BC/D

2-3-2 Main PCB

OPCB-L
(CN10,11)
CODEC1
CODEC2
(DD0:DD15)
HDD
(CN2)
LVDS
OUTPUT (2CH)
LVDS INPUT (BD)
LSU
(CN8, 9)
8 bit × 4CH
S/H
A/D
LVDS
Image data
CCDPCB
(OS1, 2, 3, 4)
(CN14, 15)
XIO 1
Decorder
TMOT CLK
AC CONT
TC CONT
TONER CONT
DB CONT (Ladder)
GRID CONT (Ladder)
*: Optional
2-3-6
(D0:D31)
SDRAM
8M byte × 2
(A2:A23)
(D0:D15)
LCD controller
Buffer
A/D
Flash
(DBB8:DBB15) (DBB0:DBB15)
memory
×
8 Mbit 2
(CD0:CD15)
(CD16:CD31)
MIP 2BC
27.5 MHz
MIP 2BC
26 MHz
33.892 MHz
LVDS
CPU
12 MHz
INT1
Backup SRAM
256 kbit
Flash memory
2 Mbit
Buffer
CL
INTXIO 1
INTXIO 3
XIO 4
24 V OFF
D/A
EPCB (CN1)
Figure 2-3-3 Main PCB block diagram
PCI BUS (32 bit)
INT CODEC2
INT5
CPU
INT CODEC1
INT4
INT MCP
8.29 MHz
INT3
INT HDD
INT2
MACK_MMI
INT0
xD0
INT C
INT3
24V OFF
INT4
MACK MAIN
XIO 5
(DBB8:DBB15)
Dual port
RAM
CK, VS, MRE
xD0
UART
xD1
ZERO CROSS
INT4
INT3
INT0
TA4
TA3
DF CMOT CLK
TA1
AN0
SCAN MOT CLK
Flash memory
8 Mbit
Analog
SRAM
× 2
switch
256 kbit
From MIP 2BC
XIO 2
XIO 3
INT0-3
To XIO 5
S MOT Vref (Ladder)
DF CMOT Vref (Ladder)
NSPCB*
(CN4)
(D0:D15)
Compact
flash
slot
(CN6)
Flash
(DBB0:DBB15)
jig
(CN20)
(MD0:MD31)
DIMM*
(CN24)
CK, VS, MRE
Fax
CK, VS, MRE
PCB*
UART
TOD(7:0)
TAMPCB*
CK, VS, MRE
(CN5)
TID (7:0)
PRID (7:0)
PRIPPCB*
CK, VS, MRE
(CN3)
SI/F
Finisher*
(CN1)
From PSPCB
DF
(CN12)
DF SIZE
SP SENSE
FIX TH SENSE
ET TH2
HUM SENSE
TONER SENSE
Terminal
UART I/F
(CN30)
UART
Side deck*
(CN13)
HPSW
DF TIMMIG SW
DF REV SW
DF FD SW