Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3147

Sharc+ processor
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Packet Engine Result Descriptor Ring Base Address
The
PKTE_RDRBASE_ADDR
cable in autonomous ring mode and target command mode with RDR enabled. Note that in target command
mode, the CDR is not used, but the RDR must be configured when enabled so that the packet engine knows where
to write the result descriptors.
VALUE[31:16] (R/W)
Result Descriptor Ring Base Address
Figure 44-33: PKTE_RDRBASE_ADDR Register Diagram
Table 44-59: PKTE_RDRBASE_ADDR Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register holds the result descriptor ring base address in host memory. It is only appli-
15
0
VALUE[15:0] (R/W)
Result Descriptor Ring Base Address
31
0
Bit Name
Result Descriptor Ring Base Address.
The PKTE_RDRBASE_ADDR.VALUE bit field specifies the base location of the re-
sult descriptor ring in the host memory space.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x PKTE Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
44–99

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