2.1 CPU
Restrictions on interrupt disable instructions and prefix instructions
When a prefix code is placed before an interrupt disable instruction, the prefix code affects the first
instruction after the code other than the interrupt disable instruction.
MOV A, FF
H
CCR:XXX10XX
Consecutive prefix codes
When competitive prefix codes are placed consecutively, the latter becomes valid.
• • • • •
In the figure above, competitive prefix codes are PCB, ADB, DTB, and SPB.
30
Chapter 2: CPU
Interrupt disable instruction
NCC
MOV ILM,#imm8
Figure 2.1.3b Interrupt disable instructions and prefix codes
Prefix code
ADB
DTB
Figure 2.1.3c Consecutive prefix codes
• • • •
CCR does not change with NCC.
PCB
ADD A,01
H
PCB is valid as the prefix code
ADD A,01
H
CCR:XXX10XX
• • •
•
MB90580 Series