Cpc Signal Routing Guidelines; Cpc To Clock Length Matching Requirements; Cpc Control Signal Routing Guidelines - Intel 855GME Design Manual

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Intel
855GME Chipset and Intel
System Memory Design Guidelines (DDR-SDRAM)
5.4.7.2

CPC Signal Routing Guidelines

Table 41
Table 41. CPC Control Signal Routing Guidelines
Signal Group
Motherboard Topology
Reference Plane
Characteristic Trace Impedance (Zo)
Nominal Trace Width
Minimum Spacing to Trace Width Ratio
Minimum Isolation Spacing to non-DDR Signals
Package Length P1
Trace Length P1+ L1
Trace Length L2 – DIMM Pad to Parallel Termination
Resistor Pad
Parallel Termination Resistor (Rt)
Maximum Recommended Motherboard Via Count
Per Signal
Length Matching Requirements
NOTES:
1. Recommended resistor values and trace lengths may change in a later revision of the design guide.
2. Power distribution vias from Rt to Vtt are not included in this count.
3. It is possible to route using two vias if one via is shared that connects to the DIMM pad and parallel
termination resistor.
4. The overall maximum and minimum length to the DIMM must comply with clock length matching
requirements.
5.4.7.3

CPC to Clock Length Matching Requirements

The total length of the CPC signals, between the GMCH die-pad and the DIMM must fall within
the range defined below, with respect to the associated clock reference length. Refer to
for a definition of the various trace segments. The length the trace from the DIMM to the
termination resistor need not be length matched. The length matching requirements are also
depicted in
Length range formula for DIMM0:
X
= SCK[2:0]/SCK[2:0]# total reference length, including package length. Refer to
0
for more information.
Y
= SMA[5,4,2,1] total length = GMCH Package length + L1, as shown in
0
– 1.5") ≤ Y
(X
0
148
®
6300ESB ICH Embedded Platform Design Guide
presents CPC control signal routing guidelines.
Parameter
Figure
74. A table of CPC signal package length is provided at the end of this section.
≤ (X
- 0.5")
0
0
Routing Guidelines
SMA[5,4,2,1], SMAB[5,4,2,1]
Point-to-Point with Parallel Termination
Ground Referenced
55 Ω ± 15%
Inner layers: 4 mils
Outer layers: 5 mils
2:1 (e.g., 8 mil space to 4 mil trace)
20 mils
500 mils ± 250 mils
Refer to package length
Table 42
Min = 2.0 inches
Max = 6.0 inches
Max = 2.0 inches
56 Ω ± 5%
3
Match CPC to SCK[5:0]/SCK[5:0]#
Refer to length matching
Section 5.4.7.3
Figure 74
for details.
for exact lengths.
and
Figure 73
Section 5.4.1
Figure
73, where:

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