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®
Intel
855GME Chipset and Intel
Hub Interface
Figure 87.
8-Bit Hub Interface Local HIREF/HI_VSWING Generation Circuit Option B
1. Each 0.01 µF bypass capacitor should be placed within 0.25 inches of HIREF/VREF pin (C4) and
HI_VSWING pin (C2).
Figure 88.
8-Bit Hub Interface Single HIREF/HI_VSWING Generation Circuit Option C
1. Two 0.1 µF capacitors (C1 and C3) should be placed close to the divider.
2. Each 0.01 µF bypass capacitor (C2, C4, C5, and C6) should be placed within 0.25 inches of HIREF/VREF
pin (for C4 and C6) and HI_VSWING pin (for C2 and C5)
186
®
6300ESB ICH Embedded Platform Design Guide
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