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®
Intel
855GME Chipset and Intel
®
Figure 151. Intel
Voltage Generation Circuit
+VCC P
301
1%
R 1a
150
1%
12.3.3
Hub Interface Checklist
Table 125
Table 125. Hub Interface Checklist
Pin Name
Hl[10:0]
HLSTB (S)
HLSTB# (F)
HLVREF
PSWING
HLRCOMP
855GME Chipset HXSWING and HYSWING Reference
H XSW ING
C1a
presents the hub interface checklist.
System
Pull-up/Pull-down
Refer to
Section
8.1.4.2.
Refer to
Section
8.1.4.2.
37.4 Ω 1% pull-up to 1.35V
core voltage
January 2007
®
6300ESB ICH Embedded Platform Design Guide
H XSW IN G
HYSW ING
G M CH
Connect to the 6300ESB (HI[10:0] signals). Refer to
Section 8.1
for more information.
Connect to the 6300ESB (HL_STBS signal).
Connect to the 6300ESB (HL_STBF signal).
Signal voltage level = 0.35 V ± 8%.
Signal voltage level = 2/3 of V1P2_GMCH or
0.8 V ± 8%.
Refer to
Section 8.1.5
Schematic Checklist Summary
+VCC P
H YSW ING]
C 1b
Notes
for more information.
301
1%
150
1%
√
277
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