System Overview; Terminology; System Features - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel

System Overview

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The Intel
embedded platforms. The GMCH provides the processor interface, system memory interface
(DDR SDRAM), hub interface, CRT, LVDS, and a DVO interface. It is optimized for the Intel
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Pentium
The accelerated hub architecture interface (the chipset component interconnect) is designed into
the chipset to provide an efficient, high bandwidth, communication channel between the GMCH
and the 6300ESB ICH.
An ACPI-compliant Intel 855GME chipset embedded platform may support the Full-On (S0),
Power On Suspend (S1-M), Suspend to RAM (S3), Suspend to Disk (S4), and Soft-Off (S5) power
management states. Through the use of an appropriate LAN device, the chipset also supports wake-
on LAN for remote administration and troubleshooting. The chipset architecture removes the
requirement for the ISA expansion bus that was traditionally integrated into the I/O subsystem of
PCIsets/AGPsets. This removes many of the conflicts experienced when installing hardware and
drivers into legacy ISA systems. The elimination of ISA provides true plug-and-play for the
platform. Traditionally, the ISA interface was used for audio and modem devices. The addition of
AC'97* allows the OEM to use software-configurable AC'97 audio and modem coder/decoders
(codecs) instead of the traditional ISA devices.
2.1

Terminology

For this document, the following terminology applies.
82855GME
6300ESB
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Intel Pentium M Processor
2.2

System Features

The 855GME chipset contains two core components: the GMCH and the 6300ESB ICH. The
GMCH integrates a 400 MHz Intel
controller, integrated graphics controller interface, integrated LVDS interface, two digital video out
ports, a 266/333 MHz DDR-SDRAM controller, and a high-speed accelerated hub architecture
interface for communication with the 6300ESB. The 6300ESB integrates an Ultra ATA 100/66/33
controller, USB host controller that supports the USB 1.1 and USB 2.0 specification, LPC
interface, FWH Flash BIOS interface controller, PCI interface controller, PCI-X interface
controller, two port Serial ATA controller, AC'97 digital controller, two 16550 UART serial ports,
and a hub interface for communication with the GMCH.
855GME chipset system block diagram.
855GME chipset contains a Graphics Memory Controller Hub (GMCH) component for
M processor and the Intel
Intel's mobile Graphics Memory Controller Hub.
applications.
The Intel Pentium M processor or the Intel
processor on 90nm process with 2MB L2 cache
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January 2007
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6300ESB ICH Embedded Platform Design Guide
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6300ESB ICH.
Intel's ICH southbridge device for embedded and enterprise
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Pentium M processor/Celeron
Figure 1
System Overview
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Pentium M
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M processor system bus
depicts the embedded Intel
2
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